IEEE

Efficient Hardware Implementation of Partial Response Equalization with Reduced-State Sequence Estimation Decoder and Blind Adaptation Using Delay Zero Forcing Algorithm for DCI

Abstract: With the growing demand for data center interconnect (DCI) capacity, partial response equalization (PRE), employing either a 1/(1+D) decoder or an maximum likelihood sequence estimation ...
IEEE

LDPC decoder based on a minimalist bipartite GCN

Abstract: This paper proposes a Low-Density Parity-Check (LDPC) decoder based on a minimalist bipartite graph convolutional neural network (GCN). The proposed method has been validated in a 16QAM ...