EDN

Quad performance serial peripheral interface

Master/Slave with not only single and dual but most of all quad SPI Bus support, is the newest IP Core introduced by Digital Core Design. The DQSPI system is flexible enough to interface directly with ...
Design-Reuse

SPI Serial Peripheral Interface Master/Slave

The CC-SPI-APB is a synthesisable Verilog model of a SPI serial peripheral interface Master/Slave controller. The SPI core can be efficiently implemen ...
EDN

The Serial Peripheral Interface Bus

The SPI is an interface bus that is used to send data between microcontrollers, and/or other peripherals like sensors, flash and EEPROM memory, LCDs, SD Cards, Camera Lenses and many more. Being able ...
Electronic Design

Isolate Your High-Speed SPI Bus Despite Long Propagation Delays

The serial peripheral interface (SPI) bus is a synchronous, full-duplex, serial data link commonly used for the short-distance data exchange between a master device, such as a microcontroller unit ...
Design-Reuse

Digital Core Design Announces SPI master slave enhanced with detectors

Oct 7th, 2013 -- The DSPI_FIFO is a fully configurable SPI master/slave device, which allows to configure polarity and phase of a serial clock signal SCK. DCD’s core enables microcontroller to ...