A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat ...
A new technical paper titled “Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs” was published by researchers at Georgia Tech, California Polytechnic State University-San Luis Obispo.
The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...
The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...
The open-source nature of RISC-V brings the benefits of a modular and royalty-free instruction set architecture (ISA) that eliminates licensing fees, can accelerate development, and fosters ...
The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
tom's Hardware on MSN
RISC-V mini AI PC that fits inside a Framework laptop shell revealed — DeepComputing's DC-ROMA RISC-V AI PC claims 50 TOPS, 64GB RAM
DeepComputing has developed a reputation as a pioneer of small form factor RISC-V PCs, being the first company to bring a ...
OpenHW Group, a leading player in the open-source hardware community, has recently unveiled its comprehensive Development Kit for an open-source RISC-V Microcontroller Unit (MCU), known as the OpenHW ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results